From badd59d1ea6302e769cce721162a89464061b611 Mon Sep 17 00:00:00 2001 From: RecursiveError Date: Sat, 18 Apr 2026 23:01:51 -0300 Subject: [PATCH] update stm32 clock configs --- .../stm32/src/stm32f1xx/advanced_adc.zig | 2 +- examples/stmicro/stm32/src/stm32f1xx/gpio.zig | 10 +- examples/stmicro/stm32/src/stm32f1xx/rcc.zig | 12 +- examples/stmicro/stm32/src/stm32f1xx/rtc.zig | 2 +- .../stmicro/stm32/src/stm32f1xx/timer.zig | 2 +- .../stm32/src/stm32f1xx/timer_capture.zig | 2 +- .../stmicro/stm32/src/stm32f1xx/usb_cdc.zig | 10 +- .../stmicro/stm32/src/stm32f1xx/usb_hid.zig | 15 +- .../stm32/src/stm32f1xx/usb_remote_hid.zig | 455 ------------------ port/stmicro/stm32/build.zig.zon | 4 +- .../stm32/src/boards/STM32F3DISCOVERY.zig | 18 +- port/stmicro/stm32/src/hals/STM32F103/rcc.zig | 101 ++-- port/stmicro/stm32/src/hals/STM32F303.zig | 4 +- port/stmicro/stm32/src/hals/STM32F303/rcc.zig | 133 ++--- port/stmicro/stm32/src/hals/STM32L47X.zig | 4 +- port/stmicro/stm32/src/hals/STM32L47X/rcc.zig | 17 +- 16 files changed, 133 insertions(+), 658 deletions(-) delete mode 100644 examples/stmicro/stm32/src/stm32f1xx/usb_remote_hid.zig diff --git a/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig b/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig index 0c32e9c13..f3882df00 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/advanced_adc.zig @@ -49,7 +49,7 @@ fn adc_to_temp(val: usize) f32 { pub fn main() !void { _ = try rcc.apply(.{ - .ADCPresc = .RCC_ADCPCLK2_DIV2, + .ADCPresc = .Div2, .flags = .{ .USE_ADC1 = true, }, diff --git a/examples/stmicro/stm32/src/stm32f1xx/gpio.zig b/examples/stmicro/stm32/src/stm32f1xx/gpio.zig index 66fc59de0..75ec2574c 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/gpio.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/gpio.zig @@ -8,11 +8,11 @@ const time = stm32.time; pub fn main() !void { _ = try rcc.apply(.{ - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .PLLSource = .RCC_PLLSOURCE_HSE, - .PLLMUL = .RCC_PLL_MUL9, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .RTCClockSelection = .RCC_RTCCLKSOURCE_LSI, + .SYSCLKSource = .PLL1_P, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .PLLMUL = .Mul9, + .APB1CLKDivider = .Div2, + .RTCClockSelection = .LSI, .flags = .{ .RTCUsed_ForRCC = true, .HSEOscillator = true, diff --git a/examples/stmicro/stm32/src/stm32f1xx/rcc.zig b/examples/stmicro/stm32/src/stm32f1xx/rcc.zig index a90450628..7c2c9e161 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/rcc.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/rcc.zig @@ -15,12 +15,12 @@ pub const microzig_options = microzig.Options{ }; const clk_config = rcc.Config{ - .PLLSource = .RCC_PLLSOURCE_HSE, - .HSEDivPLL = .RCC_HSE_PREDIV_DIV1, - .PLLMUL = .RCC_PLL_MUL2, - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .RCC_MCOSource = .RCC_MCO1SOURCE_SYSCLK, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .HSEDivPLL = .Div2, + .PLLMUL = .Mul2, + .SYSCLKSource = .PLL1_P, + .APB1CLKDivider = .Div2, + .RCC_MCOSource = .SYS, .flags = .{ .HSEOscillator = true, .MCOUsed_ForRCC = true, diff --git a/examples/stmicro/stm32/src/stm32f1xx/rtc.zig b/examples/stmicro/stm32/src/stm32f1xx/rtc.zig index 50300c36e..080b98872 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/rtc.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/rtc.zig @@ -31,7 +31,7 @@ pub fn main() !void { //If it is not running, we will configure it and enable it. if (fresh_start()) { _ = try rcc.apply(.{ - .RTCClockSelection = .RCC_RTCCLKSOURCE_LSE, + .RTCClockSelection = .LSI, .flags = .{ .RTCUsed_ForRCC = true, .LSEOscillator = true }, }); rcc.enable_clock(.PWR); diff --git a/examples/stmicro/stm32/src/stm32f1xx/timer.zig b/examples/stmicro/stm32/src/stm32f1xx/timer.zig index 3d7a91b90..a2df62be4 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/timer.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/timer.zig @@ -28,7 +28,7 @@ pub fn main() !void { //use HSE as system clock source, more stable than HSI _ = try rcc.apply(.{ - .SYSCLKSource = .RCC_SYSCLKSOURCE_HSE, + .SYSCLKSource = .HSE, .flags = .{ .HSEOscillator = true }, }); diff --git a/examples/stmicro/stm32/src/stm32f1xx/timer_capture.zig b/examples/stmicro/stm32/src/stm32f1xx/timer_capture.zig index a7cd2c7ff..cc3c9b609 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/timer_capture.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/timer_capture.zig @@ -66,7 +66,7 @@ pub fn main() !void { //use HSE as system clock source, more stable than HSI _ = try rcc.apply(.{ - .SYSCLKSource = .RCC_SYSCLKSOURCE_HSE, + .SYSCLKSource = .HSE, .flags = .{ .HSEOscillator = true }, }); diff --git a/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig b/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig index 52ce33435..d3429c9e6 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig @@ -413,11 +413,11 @@ fn CDC_read(buf: []u8, timeout: ?Duration) ![]const u8 { pub fn main() !void { _ = try rcc.apply(.{ - .PLLSource = .RCC_PLLSOURCE_HSE, - .PLLMUL = .RCC_PLL_MUL9, - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .USBPrescaler = .RCC_USBCLKSOURCE_PLL_DIV1_5, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .PLLMUL = .Mul9, + .SYSCLKSource = .PLL1_P, + .APB1CLKDivider = .Div2, + .USBPrescaler = .Div1_5, .flags = .{ .HSEOscillator = true, .USBUsed_ForRCC = true, diff --git a/examples/stmicro/stm32/src/stm32f1xx/usb_hid.zig b/examples/stmicro/stm32/src/stm32f1xx/usb_hid.zig index bbc2546a7..2bdde6526 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/usb_hid.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/usb_hid.zig @@ -257,12 +257,15 @@ fn report(keys: []const u8) void { pub fn main() !void { _ = try rcc.apply(.{ - .PLLSource = .RCC_PLLSOURCE_HSE, - .PLLMUL = .RCC_PLL_MUL9, - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .USBPrescaler = .RCC_USBCLKSOURCE_PLL_DIV1_5, - .flags = .{ .HSEOscillator = true, .USBUsed_ForRCC = true }, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .PLLMUL = .Mul9, + .SYSCLKSource = .PLL1_P, + .APB1CLKDivider = .Div2, + .USBPrescaler = .Div1_5, + .flags = .{ + .HSEOscillator = true, + .USBUsed_ForRCC = true, + }, }); rcc.enable_clock(.GPIOA); diff --git a/examples/stmicro/stm32/src/stm32f1xx/usb_remote_hid.zig b/examples/stmicro/stm32/src/stm32f1xx/usb_remote_hid.zig deleted file mode 100644 index 1c6c2dba4..000000000 --- a/examples/stmicro/stm32/src/stm32f1xx/usb_remote_hid.zig +++ /dev/null @@ -1,455 +0,0 @@ -//NOTE: This is just an experimental test, USB HAL for the F1 family is not complete. - -const std = @import("std"); -const microzig = @import("microzig"); - -const host = microzig.core.arm_semihosting; - -const RCC = microzig.chip.peripherals.RCC; -const flash = microzig.chip.peripherals.FLASH; -const rcc_v1 = microzig.chip.types.peripherals.rcc_f1; -const flash_v1 = microzig.chip.types.peripherals.flash_f1; - -const stm32 = microzig.hal; -const gpio = stm32.gpio; -const timer = stm32.timer.GPTimer.init(.TIM2).into_counter_mode(); -const usb_ll = stm32.usb.usb_ll; -const descriptor = microzig.core.usb.descriptor; - -const EpControl = usb_ll.EpControl; - -const interrupt = microzig.interrupt; -var Counter: stm32.drivers.CounterDevice = undefined; -const IR_pin = gpio.Pin.from_port(.B, 0); -const peri = microzig.chip.peripherals; -const t_types = microzig.chip.types.peripherals.timer_v1; - -pub const microzig_options: microzig.Options = .{ - .interrupts = .{ - .USB_LP_CAN1_RX0 = .{ .c = usb_ll.usb_handler }, - .EXTI0 = .{ .c = IR_handler }, - .TIM3 = .{ .c = IR_timer_handler }, - }, -}; - -// ============== HID Descriptor ================ -const DeviceDescriptor = [18]u8{ - 0x12, // bLength - 0x01, // bDescriptorType (Device) - 0x10, 0x01, // bcdUSB (USB 1.1) - 0x00, // bDeviceClass (Defined at Interface) - 0x00, // bDeviceSubClass - 0x00, // bDeviceProtocol - 0x40, // bMaxPacketSize0 (64 bytes) - 0x55, 0xF0, // idVendor FOSS - 0x01, 0x98, // idProduct (0x9801) HID - 0x00, 0x01, // bcdDevice (1.00) - 0x01, // iManufacturer (String Index 1) - 0x02, // iProduct (String Index 2) - 0x00, // iSerialNumber (None) - 0x01, // bNumConfigurations -}; - -const ConfigurationDescriptor = [34]u8{ - // Configuration Descriptor (9 bytes) - 0x09, // bLength - 0x02, // bDescriptorType (Configuration) - 0x22, 0x00, // wTotalLength (34 bytes) - 0x01, // bNumInterfaces - 0x01, // bConfigurationValue - 0x00, // iConfiguration (None) - 0x80, // bmAttributes (Bus Powered) - 0x32, // bMaxPower (100 mA) - - // Interface Descriptor (9 bytes) - 0x09, // bLength - 0x04, // bDescriptorType (Interface) - 0x00, // bInterfaceNumber - 0x00, // bAlternateSetting - 0x01, // bNumEndpoints - 0x03, // bInterfaceClass (HID) - 0x01, // bInterfaceSubClass (Boot Interface) - 0x01, // bInterfaceProtocol (Keyboard) - 0x00, // iInterface (None) - - // HID Descriptor (9 bytes) - 0x09, // bLength - 0x21, // bDescriptorType (HID) - 0x11, 0x01, // bcdHID (1.11) - 0x00, // bCountryCode (Not Supported) - 0x01, // bNumDescriptors - 0x22, // bDescriptorType (Report) - 0x3F, 0x00, // wDescriptorLength (62 bytes) - - // Endpoint Descriptor (7 bytes) - 0x07, // bLength - 0x05, // bDescriptorType (Endpoint) - 0x81, // bEndpointAddress (EP1 IN) - 0x03, // bmAttributes (Interrupt) - 0x08, 0x00, // wMaxPacketSize (8 bytes) - 0x0A, // bInterval (10 ms) -}; - -const ReportDescriptor = [63]u8{ - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x06, // Usage (Keyboard) - 0xA1, 0x01, // Collection (Application) - - // Modifier Keys (Shift, Ctrl, Alt, etc) - 0x05, 0x07, // Usage Page (Key Codes) - 0x19, 0xE0, // Usage Minimum (0xE0) - 0x29, 0xE7, // Usage Maximum (0xE7) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x01, // Logical Maximum (1) - 0x75, 0x01, // Report Size (1 bit) - 0x95, 0x08, // Report Count (8 bits) - 0x81, 0x02, // Input (Data, Var, Abs) - - // Reserved (1 byte) - 0x95, 0x01, // Report Count (1) - 0x75, 0x08, // Report Size (8) - 0x81, 0x01, // Input (Const) - - // Key Array (6 bytes) - 0x95, 0x06, // Report Count (6) - 0x75, 0x08, // Report Size (8) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x65, // Logical Maximum (101) - 0x05, 0x07, // Usage Page (Key Codes) - 0x19, 0x00, // Usage Minimum (0) - 0x29, 0x65, // Usage Maximum (101) - 0x81, 0x00, // Input (Data, Array) - - // Output (LEDs: Caps Lock, Num Lock, etc) - 0x95, 0x05, // Report Count (5) - 0x75, 0x01, // Report Size (1) - 0x05, 0x08, // Usage Page (LEDs) - 0x19, 0x01, // Usage Minimum (1) - 0x29, 0x05, // Usage Maximum (5) - 0x91, 0x02, // Output (Data, Var, Abs) - - // Reserved (3 bits) - 0x95, 0x01, // Report Count (1) - 0x75, 0x03, // Report Size (3) - 0x91, 0x01, // Output (Const) - 0xC0, // End Collection -}; - -// ============== HID Descriptor ================ - -//=============== USB DATA ================= -var EP0_RX_BUFFER: [64]u8 = undefined; -var HID_send: [8]u8 = .{0} ** 8; -var to_report: bool = false; -var device_addr: ?u7 = null; -var config: bool = false; -//=============== USB DATA ================= -//==========IR NEC ========== -const NecPkg = packed struct(u32) { - addr_h: u8, - addr_l: u8, - cmd: u8, - inv_cmd: u8, -}; -//==========IR NEC ========== - -const lang_id: descriptor.String = .from_lang(.English); -const prod_id: descriptor.String = .from_str("Zig Keyboard"); -const manu_id: descriptor.String = .from_str("RecursiveError"); -fn get_string(index: usize) []const u8 { - return switch (index) { - 0 => &lang_id.data, - 1 => &manu_id.data, - 2 => &prod_id.data, - else => &[_]u8{}, - }; -} - -//TODO port USB driver from RPxxxx USB HAL -fn get_descriptor(setup: []const u8, epc: EpControl) void { - const descriptor_type = setup[3]; - const descriptor_length: u16 = @as(u16, setup[6]) | (@as(u16, setup[7]) << 8); - - const buffer: []const u8 = switch (descriptor_type) { - 0x01 => &DeviceDescriptor, - 0x02 => &ConfigurationDescriptor, - 0x03 => get_string(setup[2]), - 0x22 => &ReportDescriptor, - else => { - return; - }, - }; - - const length = @min(buffer.len, descriptor_length); - epc.write_buffer(buffer[0..length]) catch unreachable; - epc.set_status(.TX, .Valid, .force_data1) catch unreachable; -} - -fn set_addr(recive_addr: u7, epc: EpControl) void { - device_addr = recive_addr; - epc.ZLP() catch unreachable; - epc.set_status(.TX, .Valid, .force_data1) catch unreachable; -} - -fn ep0_setup(epc: EpControl, _: ?*anyopaque) void { - epc.set_status(.RX, .Valid, .no_change) catch unreachable; - - const setup = epc.read_buffer(&EP0_RX_BUFFER) catch unreachable; - if (setup.len == 0) { - return; - } - - switch (setup[1]) { - 0x06 => get_descriptor(setup, epc), - 0x05 => set_addr(@intCast(setup[2]), epc), - 0x09 => { - epc.ZLP() catch unreachable; - epc.set_status(.TX, .Valid, .force_data1) catch unreachable; - config = true; - to_report = false; - }, - else => { - epc.ZLP() catch unreachable; - epc.set_status(.TX, .Valid, .force_data1) catch unreachable; - }, - } -} - -fn ep0_rx(epc: EpControl, _: ?*anyopaque) void { - epc.set_status(.RX, .Valid, .no_change) catch unreachable; -} - -fn ep0_tx(epc: EpControl, _: ?*anyopaque) void { - if (device_addr) |addr| { - usb_ll.set_addr(addr); - } - epc.set_status(.RX, .Valid, .endpoint_ctr) catch unreachable; -} - -fn ep1_tx(epc: EpControl, _: ?*anyopaque) void { - to_report = false; - epc.set_status(.TX, .Nak, .no_change) catch unreachable; -} - -//set clock to 72Mhz and USB to 48Mhz -//NOTE: USB clock must be exactly 48Mhz -fn config_clock() void { - RCC.CR.modify(.{ - .HSEON = 1, - }); - while (RCC.CR.read().HSERDY == 0) { - asm volatile ("nop"); - } - - RCC.CFGR.modify(.{ - .PLLSRC = rcc_v1.PLLSRC.HSE_Div_PREDIV, - .PLLMUL = rcc_v1.PLLMUL.Mul9, - }); - - RCC.CR.modify(.{ - .PLLON = 1, - }); - - while (RCC.CR.read().PLLRDY == 0) { - asm volatile ("nop"); - } - - flash.ACR.modify(.{ - .LATENCY = flash_v1.LATENCY.WS2, - .PRFTBE = 1, - }); - - RCC.CFGR.modify(.{ - .PPRE1 = rcc_v1.PPRE.Div2, - .USBPRE = rcc_v1.USBPRE.Div1_5, - }); - - RCC.CFGR.modify(.{ - .SW = rcc_v1.SW.PLL1_P, - }); - - while (RCC.CFGR.read().SWS != rcc_v1.SW.PLL1_P) { - asm volatile ("nop"); - } -} - -const endpoint0 = usb_ll.Endpoint{ - .ep_control = .EPC0, - .endpoint = 0, - .ep_type = .Control, - .ep_kind = false, - .rx_reset_state = .Valid, - .tx_reset_state = .Nak, - .rx_buffer_size = .{ .block_qtd = 2, .block_size = .@"32bytes" }, - .tx_buffer_size = 64, - .rx_callback = ep0_rx, - .tx_callback = ep0_tx, - .setup_callback = ep0_setup, -}; - -const endpoint1 = usb_ll.Endpoint{ - .ep_control = .EPC1, - .endpoint = 1, - .ep_type = .Interrupt, - .ep_kind = false, - .rx_reset_state = .Nak, - .tx_reset_state = .Nak, - .rx_buffer_size = .{ .block_qtd = 1, .block_size = .@"2bytes" }, - .tx_buffer_size = 16, - .tx_callback = ep1_tx, -}; - -//TODO: full HID report function -fn report(keys: []const u8) void { - const len = @min(keys.len, 6); - const epc = usb_ll.EpControl.EPC1; - const report_flag: *volatile bool = &to_report; - if (!config) return; - while (report_flag.*) {} - std.mem.copyForwards(u8, HID_send[3..], keys[0..len]); - epc.write_buffer(&HID_send) catch unreachable; - epc.set_status(.TX, .Valid, .endpoint_ctr) catch unreachable; - report_flag.* = true; -} - -fn init_IR() void { - - //enable IR EXTI - IR_pin.set_input_mode(.pull); - IR_pin.set_pull(.up); - peri.AFIO.EXTICR[0].modify(.{ .@"EXTI[0]" = 1 }); - peri.EXTI.IMR.modify(.{ .@"LINE[0]" = 1 }); - peri.EXTI.FTSR.modify(.{ .@"LINE[0]" = 1 }); - peri.EXTI.RTSR.modify(.{ .@"LINE[0]" = 1 }); - peri.EXTI.PR.modify(.{ .@"LINE[0]" = 1 }); - - //enable timer - peri.TIM3.CR1.raw = 0; - peri.TIM3.CR2.raw = 0; - peri.TIM3.SR.raw = 0; - - peri.TIM3.CR1.modify(.{ .CEN = 0 }); - peri.TIM3.CR1.modify(.{ - .URS = t_types.URS.CounterOnly, - .OPM = 1, - .DIR = t_types.DIR.Down, - .ARPE = 1, - }); - peri.TIM3.PSC = 72; - peri.TIM3.DIER.modify(.{ .UIE = 1 }); - - interrupt.enable(.EXTI0); - interrupt.enable(.TIM3); -} - -fn start_IR_timer() void { - peri.TIM3.SR.raw = 0; - peri.TIM3.CR1.modify(.{ .CEN = 0 }); - peri.TIM3.PSC = 72; - peri.TIM3.ARR.modify(.{ .ARR = @as(u16, 25_000) }); - peri.TIM3.EGR.modify(.{ .UG = 1 }); - peri.TIM3.CR1.modify(.{ .CEN = 1 }); -} - -fn stop_IR_timer() usize { - peri.TIM3.CR1.modify(.{ .CEN = 0 }); - const val = peri.TIM3.CNT.read().CNT; - peri.TIM3.SR.raw = 0; - return val; -} - -var ir_val: u64 = 0; -var ir_index: u6 = 0; - -fn IR_handler() callconv(.c) void { - const pin_state = IR_pin.read(); - if (pin_state == 0) { - const val = stop_IR_timer(); - if (val != 0) { - const bit = 25_000 - val; - switch (bit) { - 200...800 => { - ir_val &= ~(@as(u64, 0) << ir_index); - ir_index += 1; - ir_index = ir_index % 63; - }, - 1200...1900 => { - ir_val |= (@as(u64, 1) << ir_index); - ir_index += 1; - ir_index = ir_index % 63; - }, - 4200...4800 => { - ir_val = 0; - ir_index = 0; - }, - else => {}, - } - } - } else if (pin_state == 1) { - start_IR_timer(); - } - peri.EXTI.PR.modify(.{ .@"LINE[0]" = 1 }); -} - -var nec_report: NecPkg = undefined; -var nec_send: bool = false; -fn IR_timer_handler() callconv(.c) void { - const val: u32 = @truncate(ir_val); - const nec: NecPkg = @bitCast(val); - if (val == 0) { - nec_send = true; - } else { - nec_report = nec; - nec_send = true; - } - ir_index = 0; - ir_val = 0; - peri.TIM3.SR.raw = 0; -} - -fn nec_to_hid(nec_cmd: u8) u8 { - return switch (nec_cmd) { - 0x1D => 0x52, //arrow up - 0x45 => 0x51, //arrow down - 0x40 => 0x50, //arrow left - 0x43 => 0x4F, //arrow right - 0x41 => 0x20, //enter - 0x0e => 0x29, //esc - else => nec_cmd, - }; -} - -pub fn main() !void { - config_clock(); - - RCC.APB2ENR.modify(.{ - .AFIOEN = 1, - .GPIOAEN = 1, - .GPIOBEN = 1, - .GPIOCEN = 1, - }); - - RCC.APB1ENR.modify(.{ - .TIM2EN = 1, - .TIM3EN = 1, - .USBEN = 1, - }); - Counter = timer.counter_device(72_000_000); - - //NOTE: the stm32f103 does not have an internal 1.5k pull-up resistor for USB, you must add one externally - interrupt.enable_interrupts(); - usb_ll.usb_init(&.{ endpoint0, endpoint1 }, Counter.make_ms_timeout(25)) catch unreachable; - init_IR(); - //interrupt.enable(.USB_LP_CAN1_RX0); - const nec: *volatile bool = &nec_send; - const n_report: *volatile NecPkg = &nec_report; - while (true) { - if (nec.*) { - report(&.{n_report.cmd}); - nec_send = false; - } else { - report(&.{ 0, 0, 0, 0, 0 }); - } - Counter.sleep_ms(10); - } -} diff --git a/port/stmicro/stm32/build.zig.zon b/port/stmicro/stm32/build.zig.zon index b0e344bbf..274211ce2 100644 --- a/port/stmicro/stm32/build.zig.zon +++ b/port/stmicro/stm32/build.zig.zon @@ -10,8 +10,8 @@ .hash = "N-V-__8AAFi8WBlOh-NikHFVBjzQE0F1KixgKjVWYnlijPNm", }, .ClockHelper = .{ - .url = "git+https://github.com/ZigEmbeddedGroup/ClockHelper#922c35eb54f0417318ccfcc32367bdcf11823ede", - .hash = "ClockHelper-2.0.0-RcMaOUMGIwEUEHQJ0C2Q-KbWdKXN2GqzQcs9MpVSTgm3", + .url = "git+https://github.com/ZigEmbeddedGroup/ClockHelper#252a3d81f80915dcd0ac280b1ef6be455447d1c5", + .hash = "ClockHelper-2.0.0-RcMaOYpcIwHRJCnKF3AVSXrDyMpUlmIpZprAHjqflyzy", }, }, .paths = .{ diff --git a/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig b/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig index 148442ae0..7be7becbf 100644 --- a/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig +++ b/port/stmicro/stm32/src/boards/STM32F3DISCOVERY.zig @@ -7,11 +7,11 @@ pub const hal = microzig.hal; const rcc = hal.rcc; pub const rcc_high_speed: rcc.Config = .{ - .PRESCALERUSB = .RCC_USBCLKSOURCE_PLL_DIV1_5, - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .PLLSource = .RCC_PLLSOURCE_HSE, - .PLLMUL = .RCC_PLL_MUL9, + .PRESCALERUSB = .Div1_5, + .SYSCLKSourceVirtual = .PLL1_P, + .APB1CLKDivider = .Div2, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .PLLMUL = .Mul9, .flags = .{ .HSEByPass = true, .HSEOscillator = true, @@ -21,10 +21,10 @@ pub const rcc_high_speed: rcc.Config = .{ }; pub const rcc_medium_speed: rcc.Config = .{ - .SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK, - .APB1CLKDivider = .RCC_HCLK_DIV2, - .PLLSource = .RCC_PLLSOURCE_HSE, - .PLLMUL = .RCC_PLL_MUL6, + .SYSCLKSourceVirtual = .PLL1_P, + .APB1CLKDivider = .Div2, + .PLLSourceVirtual = .HSE_Div_PREDIV, + .PLLMUL = .Mul6, .flags = .{ .HSEByPass = true, .HSEOscillator = true, diff --git a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig index ad975654a..21f70c452 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig @@ -1,14 +1,15 @@ //NOTE: this file is only valid for densities: Low, Medium and High. Connectivity/XL line devices are not supported in this version. //TODO: Add support for 105/107 const std = @import("std"); -const ClockTree = @import("ClockTree").get_mcu_tree(microzig.config.chip_name); const microzig = @import("microzig"); const power = @import("power.zig"); const enums = @import("../common/enums.zig"); const util = @import("../common/util.zig"); +const ClockTree = @import("ClockTree"); +const Tree = @field(ClockTree, microzig.config.chip_name); //expose only the configuration structs -pub const Config = ClockTree.Config; +pub const Config = Tree.Config; const flash_v1 = microzig.chip.types.peripherals.flash_f1; const flash = microzig.chip.peripherals.FLASH; const PLLMUL = microzig.chip.types.peripherals.rcc_f1.PLLMUL; @@ -45,8 +46,8 @@ pub const Bus = enum { }; //default clock config -var current_clocks: ClockTree.Clock_Output = blk: { - const out = ClockTree.get_clocks(.{}) catch unreachable; +var current_clocks: Tree.ClockOutput = blk: { + const out = Tree.get_clocks(.{}) catch unreachable; break :blk out.clock; }; @@ -54,38 +55,37 @@ var current_clocks: ClockTree.Clock_Output = blk: { ///Configures the system clocks ///NOTE: to configure the backup domain clocks (RTC) it is necessary to enable it through the power ///register before configuring the clocks -pub fn apply(comptime config: ClockTree.Config) ClockInitError!ClockTree.Clock_Output { - const out_data = comptime ClockTree.get_clocks(config) catch unreachable; +pub fn apply(comptime config: Tree.Config) ClockInitError!Tree.ClockOutput { + const out_data = comptime Tree.get_clocks(config) catch unreachable; try apply_internal(out_data.config); current_clocks = out_data.clock; return out_data.clock; } -fn apply_internal(config: ClockTree.Config_Output) ClockInitError!void { - const latency: flash_v1.LATENCY = if (config.FLatency) |lat| @enumFromInt(@as(u3, @intFromEnum(lat))) else .WS0; +fn apply_internal(config: Tree.OutputConfig) ClockInitError!void { + const latency: flash_v1.LATENCY = @enumFromInt(@intFromEnum(config.FLatency)); const prefetch = config.flags.PREFETCH_ENABLE; - const apb1: ?PPRE = if (config.APB1CLKDivider) |pre| @enumFromInt(@as(u3, @intFromEnum(pre))) else null; - const apb2: ?PPRE = if (config.APB2CLKDivider) |pre| @enumFromInt(@as(u3, @intFromEnum(pre))) else null; - const ahb: ?HPRE = if (config.AHBCLKDivider) |pre| @enumFromInt(@as(u4, @intFromEnum(pre))) else null; - const adc: ?ADCPRE = if (config.ADCPresc) |pre| @enumFromInt(@as(u2, @intFromEnum(pre))) else null; - const sys_clk: SW = if (config.SYSCLKSource) |src| @enumFromInt(@as(u2, @intFromEnum(src))) else .HSI; - //USB prescaler enum is inverted - const usb: ?USBPRE = if (config.USBPrescaler) |pre| @enumFromInt(@as(u1, @intFromEnum(pre)) ^ 1) else null; + const apb1: PPRE = @enumFromInt(@intFromEnum(config.APB1CLKDivider)); + const apb2: PPRE = @enumFromInt(@intFromEnum(config.APB2CLKDivider)); + const ahb: HPRE = @enumFromInt(@intFromEnum(config.AHBCLKDivider)); + const adc: ADCPRE = @enumFromInt(@intFromEnum(config.ADCPresc)); + const sys_clk: SW = @enumFromInt(@intFromEnum(config.SYSCLKSource)); + const usb: USBPRE = @enumFromInt(@intFromEnum(config.USBPrescaler)); secure_enable(); set_flash(latency, prefetch); if (config.flags.EnableHSE) { - const timout = if (config.HSE_Timout) |t| @as(usize, @intFromFloat(t)) else null; + const timout = @as(usize, config.HSE_Timout); try enable_hse(config.flags.HSEByPass, config.flags.EnbaleCSS, timout); } else { disable_hse(); } if (config.flags.PLLUsed) { - const source: PLLSRC = if (config.PLLSource) |src| @enumFromInt(@as(u1, @intFromEnum(src))) else PLLSRC.HSI_Div2; - const mul: PLLMUL = if (config.PLLMUL) |pre| @enumFromInt(@as(u4, @intFromEnum(pre))) else PLLMUL.Mul2; - const pre_div: PLLXTPRE = if (config.HSEDivPLL) |pre| @enumFromInt(@as(u1, @intFromEnum(pre))) else PLLXTPRE.Div1; + const source: PLLSRC = @enumFromInt(@intFromEnum(config.PLLSourceVirtual)); + const mul: PLLMUL = @enumFromInt(@intFromEnum(config.PLLMUL)); + const pre_div: PLLXTPRE = @enumFromInt(@intFromEnum(config.HSEDivPLL)); config_pll(source, mul, pre_div); enable_pll(); } else { @@ -97,7 +97,7 @@ fn apply_internal(config: ClockTree.Config_Output) ClockInitError!void { //BACKUP DOMAIN CLOCK CONFIG if (config.flags.EnableLSE) { - const timeout = if (config.LSE_Timout) |t| @as(usize, @intFromFloat(t)) else null; + const timeout = @as(usize, config.LSE_Timout); const bypass = config.flags.LSEByPass; try enable_lse(timeout, bypass); } else { @@ -106,34 +106,17 @@ fn apply_internal(config: ClockTree.Config_Output) ClockInitError!void { set_lsi(config.flags.LSIUsed); - rtc_config: { - if (config.flags.RTCEnable) { - if (config.RTCClockSelection) |s| { - const source = switch (s) { - .RCC_RTCCLKSOURCE_HSE_DIV128 => RTCSEL.HSE, - .RCC_RTCCLKSOURCE_LSE => RTCSEL.LSE, - .RCC_RTCCLKSOURCE_LSI => RTCSEL.LSI, - }; - config_rtc(source); - break :rtc_config; - } - } + if (config.flags.RTCEnable) { + const source: RTCSEL = @enumFromInt(@intFromEnum(config.RTCClockSelection)); + config_rtc(source); + } else { config_rtc(.DISABLE); } - mco_config: { - if (config.flags.MCOEnable) { - if (config.RCC_MCOSource) |src| { - const source: MCOSEL = switch (src) { - .RCC_MCO1SOURCE_HSE => .HSE, - .RCC_MCO1SOURCE_HSI => .HSI, - .RCC_MCO1SOURCE_PLLCLK => .PLL, - .RCC_MCO1SOURCE_SYSCLK => .SYS, - }; - config_mco(source); - break :mco_config; - } - } + if (config.flags.MCOEnable) { + const source: MCOSEL = @enumFromInt(@intFromEnum(config.RCC_MCOSource)); + config_mco(source); + } else { config_mco(.DISABLE); } @@ -142,9 +125,7 @@ fn apply_internal(config: ClockTree.Config_Output) ClockInitError!void { //in case of HSI not used, we have to disable it here //becuse the system clock configuration 'secure_enable' enables it by default - if (config.HSICalibrationValue) |val| { - calib_hsi(@intFromFloat(val)); - } + calib_hsi(@intCast(config.HSICalibrationValue)); set_hsi(config.flags.HSIUsed); } @@ -160,7 +141,7 @@ pub fn secure_enable() void { rcc.BDCR.raw = 0; rcc.CFGR.raw = 0; while (rcc.CFGR.read().SWS != .HSI) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } rcc.CR.modify(.{ @@ -175,7 +156,7 @@ pub fn set_hsi(on: bool) void { rcc.CR.modify(.{ .HSION = @intFromBool(on) }); if (on) { while (rcc.CR.read().HSIRDY == 0) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } } @@ -188,7 +169,7 @@ pub fn calib_hsi(calib: usize) void { //wait for the HSI to stabilize for (0..16) |_| { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -196,7 +177,7 @@ fn set_lsi(on: bool) void { rcc.CSR.modify(.{ .LSION = @intFromBool(on) }); if (on) { while (rcc.CSR.read().LSIRDY == 0) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } } @@ -220,7 +201,7 @@ pub fn enable_hse(bypass: bool, css: bool, timeout: ?usize) ClockInitError!void while (rcc.CR.read().HSERDY == 0) { if (ticks == 0) return error.HSETimeout; ticks -= 1; - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -245,7 +226,7 @@ fn enable_lse(timeout: ?usize, bypass: bool) ClockInitError!void { while (rcc.BDCR.read().LSERDY == 0) { if (ticks == 0) return error.LSETimeout; ticks -= 1; - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -293,21 +274,21 @@ fn config_system_clock(system_clock: SW) void { while (true) { const sws = rcc.CFGR.read().SWS; if (sws == system_clock) break; - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } pub fn enable_pll() void { rcc.CR.modify(.{ .PLLON = 1 }); while (rcc.CR.read().PLLRDY == 0) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } pub fn disable_pll() void { rcc.CR.modify(.{ .PLLON = 0 }); while (rcc.CR.read().PLLRDY != 0) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -514,15 +495,15 @@ pub fn get_clock(comptime source: Peripherals) u32 { })) current_clocks.USBoutput else if (util.match_name(peri_name, &.{ "RTC", })) current_clocks.RTCOutput else @panic("Unknown clock for peripheral"); - return @intFromFloat(clock); + return clock; } pub inline fn get_sys_clk() u32 { - return @intFromFloat(current_clocks.SysCLKOutput); + return current_clocks.SysCLKOutput; } inline fn calc_wait_ticks(val: usize) usize { - const corrent_clock: usize = @intFromFloat(current_clocks.SysCLKOutput); + const corrent_clock: usize = @intCast(current_clocks.SysCLKOutput); const ms_per_tick = corrent_clock / 1000; return ms_per_tick * val; } diff --git a/port/stmicro/stm32/src/hals/STM32F303.zig b/port/stmicro/stm32/src/hals/STM32F303.zig index 3cd46707b..259cfe597 100644 --- a/port/stmicro/stm32/src/hals/STM32F303.zig +++ b/port/stmicro/stm32/src/hals/STM32F303.zig @@ -12,11 +12,11 @@ pub const systick_timer = @import("./common/systick_timer.zig"); pub const systick = @import("./common/systick.zig"); pub fn get_sys_clk() u32 { - return @intFromFloat(rcc.current_clocks.clock.HCLKOutput); + return @intCast(rcc.current_clocks.clock.HCLKOutput); } pub fn get_systick_clk() u32 { - return @as(u32, @intFromFloat(rcc.current_clocks.clock.HCLKOutput)) / 8; + return @as(u32, @intCast(rcc.current_clocks.clock.HCLKOutput)) / 8; } pub const HAL_Options = struct { diff --git a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig index bad4cf256..41c96b4fb 100644 --- a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig +++ b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig @@ -8,13 +8,14 @@ const microzig = @import("microzig"); const Clock_Device = microzig.drivers.base.Clock_Device; const enums = @import("../common/enums.zig"); const util = @import("../common/util.zig"); -const clock_tree = @import("ClockTree").get_mcu_tree(microzig.config.chip_name); +const ClockTree = @import("ClockTree"); +const Tree = @field(ClockTree, microzig.config.chip_name); const app = microzig.app; pub const RCC_Peripheral = @This(); // Expose only configurations structs -pub const Config = clock_tree.Config; +pub const Config = Tree.Config; const RCC = microzig.chip.peripherals.RCC; const FLASH = microzig.chip.peripherals.FLASH; @@ -38,7 +39,7 @@ const USARTSW = microzig.chip.types.peripherals.rcc_f3v1.USARTSW; pub const Peripherals = enums.Peripherals; // The current running clock -pub const current_clocks: clock_tree.Tree_Output = clock_tree.get_clocks(microzig.options.hal.rcc_clock_config) catch unreachable; +pub const current_clocks: Tree.TreeOutput = Tree.get_clocks(microzig.options.hal.rcc_clock_config) catch unreachable; pub fn apply() void { apply_flash_flash(); @@ -54,7 +55,7 @@ pub fn apply() void { } fn apply_flash_flash() void { - const latency: LATENCY = if (current_clocks.config.FLatency) |lat| @enumFromInt(@as(u3, @intFromEnum(lat))) else .WS0; + const latency: LATENCY = @enumFromInt(@intFromEnum(current_clocks.config.FLatency)); const prefetch: u1 = if (current_clocks.config.flags.PREFETCH_ENABLE) 1 else 0; FLASH.ACR.modify(.{ .LATENCY = latency, .PRFTBE = prefetch }); @@ -64,11 +65,14 @@ fn apply_pll() void { if (!current_clocks.config.flags.PLLUsed) { return; } - const source: PLLSRC = if (current_clocks.config.PLLSource) |src| @enumFromInt(@as(u1, @intCast(src.get()))) else .HSI_Div2; - const mul: PLLMUL = if (current_clocks.config.PLLMUL) |pre| @enumFromInt(@as(u4, @intFromEnum(pre))) else .Mul2; - // TODO: ClockHelper need fix for STM32F303xC/xB - // const divider: PREDIV = if (current_clocks.config.PLLDivider) |pre| @enumFromInt(@as(u4, @intFromEnum(pre))) else .Div1; - //RCC.CFGR2.modify(.{ .PREDIV = divider }); + const source: PLLSRC = @enumFromInt(@intFromEnum(current_clocks.config.PLLSourceVirtual)); + const mul: PLLMUL = @enumFromInt(@intFromEnum(current_clocks.config.PLLMUL)); + + //only on STM32F303E clocktree for DIE446 + comptime if (Tree.check_MCU("DIE446")) { + const divider: PREDIV = @enumFromInt(@intFromEnum(current_clocks.config.PLLDivider)); + RCC.CFGR2.modify(.{ .PREDIV = divider }); + }; RCC.CFGR.modify(.{ .PLLSRC = source, @@ -77,7 +81,7 @@ fn apply_pll() void { RCC.CR.modify(.{ .PLLON = 1 }); while (RCC.CR.read().PLLRDY != 1) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -90,7 +94,7 @@ fn apply_hsi() void { }); while (RCC.CR.read().HSIRDY != 1) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } @@ -105,18 +109,18 @@ fn apply_hse() void { }); while (RCC.CR.read().HSERDY != 1) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } } } fn apply_prescaler() void { - const apb1: PPRE = if (current_clocks.config.APB1CLKDivider) |pre| @enumFromInt(@as(u3, @intFromEnum(pre))) else .Div1; - const apb2: PPRE = if (current_clocks.config.APB2CLKDivider) |pre| @enumFromInt(@as(u3, @intFromEnum(pre))) else .Div1; - const ahb: HPRE = if (current_clocks.config.AHBCLKDivider) |pre| @enumFromInt(@as(u4, @intFromEnum(pre))) else .Div1; - const adc12: ADCPRES = if (current_clocks.config.ADC12PRES) |pre| @enumFromInt(@as(u5, @intFromEnum(pre))) else .Div1; - const adc34: ADCPRES = if (current_clocks.config.ADC34PRES) |pre| @enumFromInt(@as(u5, @intFromEnum(pre))) else .Div1; - const usbprescal: USBPRE = if (current_clocks.config.PRESCALERUSB) |pre| @enumFromInt(@as(u1, @intFromEnum(pre))) else .Div1; + const apb1: PPRE = @enumFromInt(@intFromEnum(current_clocks.config.APB1CLKDivider)); + const apb2: PPRE = @enumFromInt(@intFromEnum(current_clocks.config.APB2CLKDivider)); + const ahb: HPRE = @enumFromInt(@intFromEnum(current_clocks.config.AHBCLKDivider)); + const adc12: ADCPRES = @enumFromInt(@intFromEnum(current_clocks.config.ADC12PRES)); + const adc34: ADCPRES = @enumFromInt(@intFromEnum(current_clocks.config.ADC34PRES)); + const usbprescal: USBPRE = @enumFromInt(@intFromEnum(current_clocks.config.PRESCALERUSB)); RCC.CFGR.modify(.{ .HPRE = ahb, @@ -147,76 +151,17 @@ fn clean_clock() void { } } -// TODO: Patch for ClockTree -fn usart1_selection(src: anytype) USART1SW { - return switch (src) { - .RCC_USART1CLKSOURCE_SYSCLK => .SYS, - .RCC_USART1CLKSOURCE_HSI => .HSI, - .RCC_USART1CLKSOURCE_LSE => .LSE, - .RCC_USART1CLKSOURCE_PCLK1 => unreachable, - .RCC_USART1CLKSOURCE_PCLK2 => .PCLK2, - }; -} - -// TODO: Patch for ClockTree -fn usart2_selection(src: anytype) USARTSW { - return switch (src) { - .RCC_USART2CLKSOURCE_SYSCLK => .SYS, - .RCC_USART2CLKSOURCE_HSI => .HSI, - .RCC_USART2CLKSOURCE_LSE => .LSE, - .RCC_USART2CLKSOURCE_PCLK1 => .PCLK1, - }; -} - -// TODO: Patch for ClockTree -fn usart3_selection(src: anytype) USARTSW { - return switch (src) { - .RCC_USART3CLKSOURCE_SYSCLK => .SYS, - .RCC_USART3CLKSOURCE_HSI => .HSI, - .RCC_USART3CLKSOURCE_LSE => .LSE, - .RCC_USART3CLKSOURCE_PCLK1 => .PCLK1, - }; -} - -// TODO: Patch for ClockTree -fn uart4_selection(src: anytype) USARTSW { - return switch (src) { - .RCC_UART4CLKSOURCE_SYSCLK => .SYS, - .RCC_UART4CLKSOURCE_HSI => .HSI, - .RCC_UART4CLKSOURCE_LSE => .LSE, - .RCC_UART4CLKSOURCE_PCLK1 => .PCLK1, - }; -} - -// TODO: Patch for ClockTree -fn uart5_selection(src: anytype) USARTSW { - return switch (src) { - .RCC_UART5CLKSOURCE_SYSCLK => .SYS, - .RCC_UART5CLKSOURCE_HSI => .HSI, - .RCC_UART5CLKSOURCE_LSE => .LSE, - .RCC_UART5CLKSOURCE_PCLK1 => .PCLK1, - }; -} - -// TODO: Patch for ClockTree -fn i2s_selection(src: anytype) ISSRC { - return switch (src) { - .RCC_I2SCLKSOURCE_EXT => .CKIN, - .RCC_I2SCLKSOURCE_SYSCLK => .SYS, - }; -} - pub fn select_clock() void { - const sys_clk: SW = if (current_clocks.config.SYSCLKSource) |src| @enumFromInt(@as(u2, @intFromEnum(src))) else .HSI; - const i2s_clk: ISSRC = if (current_clocks.config.I2SClockSource) |src| i2s_selection(src) else .SYS; - const i2c1_clk: ICSW = if (current_clocks.config.I2c1ClockSelection) |src| @enumFromInt(@as(u1, @intCast(src.get()))) else .HSI; - const i2c2_clk: ICSW = if (current_clocks.config.I2c1ClockSelection) |src| @enumFromInt(@as(u1, @intCast(src.get()))) else .HSI; + const sys_clk: SW = @enumFromInt(@intFromEnum(current_clocks.config.SYSCLKSourceVirtual)); + const i2s_clk: ISSRC = @enumFromInt(@intFromEnum(current_clocks.config.I2SClockSource)); + const i2c1_clk: ICSW = @enumFromInt(@intFromEnum(current_clocks.config.I2c1ClockSelection)); + const i2c2_clk: ICSW = @enumFromInt(@intFromEnum(current_clocks.config.I2c2ClockSelection)); - const usart1_clk: USART1SW = if (current_clocks.config.Usart1ClockSelection) |src| usart1_selection(src) else .HSI; - const usart2_clk: USARTSW = if (current_clocks.config.Usart2ClockSelection) |src| usart2_selection(src) else .HSI; - const usart3_clk: USARTSW = if (current_clocks.config.Usart3ClockSelection) |src| usart3_selection(src) else .HSI; - const uart4_clk: USARTSW = if (current_clocks.config.Uart4ClockSelection) |src| uart4_selection(src) else .HSI; - const uart5_clk: USARTSW = if (current_clocks.config.Uart5ClockSelection) |src| uart5_selection(src) else .HSI; + const usart1_clk: USART1SW = @enumFromInt(@intFromEnum(current_clocks.config.Usart1ClockSelection)); + const usart2_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Usart2ClockSelection)); + const usart3_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Usart3ClockSelection)); + const uart4_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Uart4ClockSelection)); + const uart5_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Uart5ClockSelection)); RCC.CFGR.modify(.{ .SW = sys_clk, @@ -239,7 +184,7 @@ pub fn get_clock(comptime source: Peripherals) u32 { if (comptime util.match_name(peri_name, &.{ "TIM", })) { - return @intFromFloat(@field(current_clocks.clock, peri_name ++ "out")); + return @intCast(@field(current_clocks.clock, peri_name ++ "out")); } if (comptime util.match_name(peri_name, &.{ "USART", @@ -247,7 +192,7 @@ pub fn get_clock(comptime source: Peripherals) u32 { "I2C", "RTC", })) { - return @intFromFloat(@field(current_clocks.clock, peri_name ++ "Output")); + return @intCast(@field(current_clocks.clock, peri_name ++ "Output")); } if (comptime util.match_name(peri_name, &.{ "DMA", @@ -255,24 +200,24 @@ pub fn get_clock(comptime source: Peripherals) u32 { "CRC", "GPIO", })) { - return @intFromFloat(current_clocks.clock.AHBOutput); + return @intCast(current_clocks.clock.AHBOutput); } if (comptime util.match_name(peri_name, &.{ "ADC1", "ADC2", })) { - return @intFromFloat(current_clocks.clock.ADC12output); + return @intCast(current_clocks.clock.ADC12output); } if (comptime util.match_name(peri_name, &.{ "ADC3", "ADC4", })) { - return @intFromFloat(current_clocks.clock.ADC34output); + return @intCast(current_clocks.clock.ADC34output); } if (comptime util.match_name(peri_name, &.{ "SPI1", })) { - return @intFromFloat(current_clocks.clock.APB2Prescaler); + return @intCast(current_clocks.clock.APB2Prescaler); } if (comptime util.match_name(peri_name, &.{ "SPI2", @@ -282,12 +227,12 @@ pub fn get_clock(comptime source: Peripherals) u32 { "WWDG", "IWDG", })) { - return @intFromFloat(current_clocks.clock.APB1Prescaler); + return @intCast(current_clocks.clock.APB1Prescaler); } if (comptime util.match_name(peri_name, &.{ "USB", })) { - return @intFromFloat(current_clocks.clock.USBoutput); + return @intCast(current_clocks.clock.USBoutput); } @panic("Unknown clock for peripheral"); diff --git a/port/stmicro/stm32/src/hals/STM32L47X.zig b/port/stmicro/stm32/src/hals/STM32L47X.zig index 9102c76da..91536ab4a 100644 --- a/port/stmicro/stm32/src/hals/STM32L47X.zig +++ b/port/stmicro/stm32/src/hals/STM32L47X.zig @@ -9,11 +9,11 @@ pub const i2c = @import("./STM32L47X/i2c.zig"); pub const dma = @import("./STM32L47X/dma.zig"); pub fn get_sys_clk() u32 { - return @intFromFloat(rcc.current_clocks.clock.HCLKOutput); + return @intCast(rcc.current_clocks.clock.HCLKOutput); } pub fn get_systick_clk() u32 { - return @as(u32, @intFromFloat(rcc.current_clocks.clock.HCLKOutput)) / 8; + return @as(u32, @intCast(rcc.current_clocks.clock.HCLKOutput)) / 8; } pub const HAL_Options = struct { diff --git a/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig b/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig index e7f45562e..8129e6b2a 100644 --- a/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig +++ b/port/stmicro/stm32/src/hals/STM32L47X/rcc.zig @@ -1,10 +1,11 @@ const microzig = @import("microzig"); const enums = @import("../common/enums.zig"); const util = @import("../common/util.zig"); -const clock_tree = @import("ClockTree").get_mcu_tree(microzig.config.chip_name); +const ClockTree = @import("ClockTree"); +const Tree = @field(ClockTree, microzig.config.chip_name); //expose only configurations structs -pub const Config = clock_tree.Config; +pub const Config = Tree.Config; pub const Peripherals = enums.Peripherals; const RCC = microzig.chip.peripherals.RCC; const PWR = microzig.chip.peripherals.PWR; @@ -24,7 +25,7 @@ const ICSW = enum(u2) { const pins = microzig.hal.pins; // The current running clock -pub const current_clocks: clock_tree.Tree_Output = clock_tree.get_clocks(microzig.options.hal.rcc_clock_config) catch unreachable; +pub const current_clocks: Tree.TreeOutput = Tree.get_clocks(microzig.options.hal.rcc_clock_config) catch unreachable; pub fn enable_rtc_lcd() void { RCC.APB1ENR1.modify(.{ @@ -39,7 +40,7 @@ pub fn enable_rtc_lcd() void { }); while (RCC.BDCR.read().LSERDY != 1) { - asm volatile ("" ::: .{ .memory = true }); + asm volatile (""); } RCC.BDCR.modify(.{ @@ -62,23 +63,23 @@ pub fn get_clock(comptime source: Peripherals) u32 { "UART", "I2C", })) { - return @intFromFloat(@field(current_clocks.clock, peri_name ++ "output")); + return @intCast(@field(current_clocks.clock, peri_name ++ "output")); } if (comptime util.match_name(peri_name, &.{ "SPI1", })) { - return @intFromFloat(current_clocks.clock.APB2Prescaler); + return @intCast(current_clocks.clock.APB2Prescaler); } if (comptime util.match_name(peri_name, &.{ "SPI2", "SPI3", })) { - return @intFromFloat(current_clocks.clock.APB1Prescaler); + return @intCast(current_clocks.clock.APB1Prescaler); } if (comptime util.match_name(peri_name, &.{ "USB", })) { - return @intFromFloat(current_clocks.clock.USBoutput); + return @intCast(current_clocks.clock.USBoutput); } @panic("Unknown clock for peripheral");